Embodiments consistent with the present invention relate to a method for driving a phase change memory device and, more specifically, to a technology of effectively controlling set/reset currents in a nonvolatile memory device using a phase change resistance cell.
A nonvolatile memory including a magnetic memory and a phase change memory (PCM) has a data processing speed similar to that of a volatile Random Access Memory (RAM). However, in contrast to a volatile RAM, a nonvolatile memory may conserve data even after the power is turned off.
FIGS. 1a and 1b are diagrams illustrating a conventional phase change resistor (PCR) 4.
PCR 4 comprises a phase change material (PCM) 2 inserted between a top electrode 1 and a bottom electrode 3. When a voltage and a current are applied to PCR 4, a high temperature is generated in PCM 2 so that an electric conductive state of PCR 4 is changed depending on the resistance of PCM 2. PCM 2 may comprise AgLnSbTe. PCM 2 may also comprise chalcogenide having chalcogen elements (S, Se, Te) as a main ingredient, for example, a germanium antimonic tellurium consisting of Ge—Sb—Te.
FIGS. 2a and 2b are diagrams illustrating the working principle of conventional PCR 4.
As shown in FIG. 2a, PCM 2 can be crystallized when a low current of less than a threshold value flows through PCR 4. As a result, PCM 2 is crystallized to become a low resistance material.
As shown in FIG. 2b, PCM 2 has a temperature higher than its melting point, when a high current of more than a threshold value flows through PCR 4. As a result, PCM 2 becomes a high resistance material in an amorphous phase.
In this way, PCR 4 is configured to store nonvolatile data corresponding to the two resistance states. Data “1” refers to a low resistance state of PCR 4, and data “0” refers to a high resistance state of PCR 4, so that the logic states of the two data types can be stored.
FIG. 3 is a diagram illustrating a write operation of a conventional phase change resistance cell.
Heat is generated when a current flows through top electrode 1 and bottom electrode 3 of PCR 4 for a given time. As a result, a state of PCM 2 is changed to be crystalline or amorphous depending on the amount of current applied to top electrode 1 and bottom electrode 3.
When a low current flows between top electrode 1 and bottom electrode 3 for a given time, PCM 2 becomes crystalline by a low temperature heating state, so that PCR 4, which has a low resistance, is at a set state. On the other hand, when a high current flows between top electrode 1 and bottom electrode 3 for a given time, PCM 2 becomes amorphous by a high temperature heating state, so that PCR 4, which has a high resistance, is at a reset state. The two phases may be differentiated by the change of the electric resistance of PCR 4.
A low voltage is applied to PCR 4 for a long time in order to write the set state in a write mode. On the other hand, a high voltage is applied to PCR 4 for a short time in order to write the reset state in the write mode.
In order to write the reset state into the phase change resistance cell, a high pumping voltage VPP is used as a write voltage. Pumping voltage VPP is generated using a boosting circuit in a chip.
However, in the conventional reset voltage applying method, pumping voltage VPP is applied in the write mode since an initial stage of the operation. As a result, the generation of pumping voltage VPP consumes a large amount of power.